The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 1995

Filed:

Jan. 21, 1994
Applicant:
Inventors:

Toyohito Ikeya, Higashimurayama, JP;

Toshiro Takahashi, Ohme, JP;

Kazuo Koide, Iruma, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 73 ; 326 47 ; 326 50 ;
Abstract

A CMOS LSI stably operates with high speed ECL LSI's to provide a data processing system. Two power sources of a negative ECL operation voltage and a positive CMOS operation voltage are provided. In a CMOS LSI, input signals of ECL level are successively amplified through an ECL input interface having a p-channel differential amplifier and an n-channel type differential amplifier, fed to the CMOS output buffer circuit and converted to the CMOS level, processed in a CMOS internal circuit, and output at the ECL level through output open-drain MOSFETs. The CMOS LSI is operated by two power sources which are level-shifted in correspondence with the ECL signal amplitude, instead of using ground potential and a positive voltage such as VDD.


Find Patent Forward Citations

Loading…