Use of video ram in high speed data communications

Abstract

A data communication system contains a dual-port/dual-access-mode storage subsystem, and a communication controller connecting between that subsystem and external data communication channels. The storage subsystem includes one or more dual-port/dual-access mode storage devices consisting of a pair of random access and sequential access memory arrays, with a parallel block transfer connection between the arrays. The sequential access array can store a large block of up to N bytes (N for example equal to 256), and the random access array can store multiple such blocks. The subsystem also has RAM and SAM access ports respectively controllable in random access and sequential access modes and respectively connecting to the random access and sequential access arrays. In random access mode a group of from 1 to 4 bytes is transferred between the controller and a specified address in the random access array, and in sequential access mode a block of up to N bytes is transferred in a sequential manner between the controller and the sequential access array and in a parallel manner between that array and a discretely addressed block of space in the random access array. Transfers of relatively long and short data communication messages are routed respectively through the SAM and RAM external ports by the controller, so as to efficiently match bandwidth requirements of external communication channels with access characteristics of the RAM and SAM ports.