The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 19, 1995
Filed:
Mar. 14, 1994
Barry B Heim, Mesa, AZ (US);
Paul T Hu, Tempe, AZ (US);
Deborah Beckwith, Chandler, AZ (US);
Freeman D Colbert, Gilbert, AZ (US);
MonaLisa Morgan, Mesa, AZ (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A mixed mode buffer circuit 11 including a first input (12), a second input (13), and an output (14). A voltage exceeding a supply voltage of mixed mode buffer circuit 11 can be applied to the output (14) without latchup or an increase in leakage current. The mixed mode buffer includes an output transistor (24) of a first conductivity type having a first electrode coupled to the output (14), a control electrode coupled to the first input (12), a second electrode coupled for receiving the supply voltage, and a bulk electrode. A first transistor (19) biases the bulk electrode when the voltage at the output is within a first predetermined range. A first bulk bias circuit (28) biases the bulk electrode when the output voltage is within a second predetermined range. A second bulk bias circuit (27) and a second transistor (18) couples the voltage at the output to the bulk electrode and the control electrode respectively, when the output voltage exceeds the second predetermined range.