Register logging in pipelined computer using register log queue of

Abstract

A pipelined processor has an instruction unit for decoding instructions and pre-processing operands prior to instruction execution, and an execution unit for executing the decoded instructions. The pre-processing of operands includes changes to general purpose registers, and the changes are recorded in an RLOG queue having read and write pointers. Instruction context for the RLOG queue entries is maintained in a separate RLOG base queue. When decoding begins for a new instruction, the RLOG base queue is loaded with the RLOG write pointer to the first RLOG queue entry that would record a register change for that next instruction. Each time an operand is processed that changes a general purpose register, the value of the change is recorded in the entry pointed to by the RLOG queue write pointer, and the RLOG queue write pointer is advanced. When the execution unit retires an instruction, its entries in the RLOG queue are discarded by advancing the RLOG queue read pointer to the pointer read from the RLOG base queue, and the pointer read from the RLOG base queue is removed from the RLOG base queue. During an unwind process in response to an exception, a micro-control unit successively reads a register change from the RLOG queue, checks whether the RLOG queue is empty, restores the register, and advances the RLOG queue read pointer until the RLOG queue becomes empty, and then resets the RLOG queue and the RLOG base queue.