The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 1995

Filed:

Mar. 07, 1994
Applicant:
Inventors:

David G Spaniol, Scottsdale, AZ (US);

Joseph Murray, Scottsdale, AZ (US);

Assignee:

VLSI Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395310 ; 395821 ; 395427 ; 36518905 ; 365221 ; 364239 ; 3642391 ; 3642397 ; 364240 ; 364D / ;
Abstract

A PCI bus writes non-contiguous data in a maximum of two PCI bus write cycles. A Bridge is provided which can combine data within its write buffer such that non-contiguous data results. Some I/O devices on the PCI bus cannot handle non-contiguous data, so the Bridge detects non-contiguous data, and generates appropriate write cycles to the PCI bus to transfer this data in a contiguous fashion. The method described takes advantage of the multiple data phase capability of the PCI bus to transfer data at more than one address during one PCI bus write cycle, and optimizes these transfers to assure that all non-contiguous transfers can occur in only two PCI bus write cycles.


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