Digital circuit for the introduction of dither into an analog signal

Abstract

An electronics circuit for digitizing an analog audio or like data signal to a six bit digital equivalent signal and then introducing a dither component into the digital equivalent signal. The electronics circuit includes an Erasable Programmed Read Only Memory (EPROM) which generates a six bit dither component to be added to the digital equivalent signal. A binary adder adds a dither bit to each of the six bits of the digital equivalent signal and then provides a three bit equivalent digital signal. The three bit equivalent digital signal is then written in parallel into a first storage register, while one bit of the three bit digital equivalent signal is written into a second storage register. When a fuze active signal, which is input to the present invention, is a logic zero the first register is enabled for a read operation allowing the three bit equivalent digital data to be read from the first register to a parallel to serial converter which converts the data to a serial three bit digital format. When the fuze activate signal is a logic one the second register is enabled for a read operation allowing the one bit equivalent digital data to be read from the second register to the parallel to serial converter which converts the data to a serial one bit digital format.