The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 05, 1995
Filed:
Mar. 31, 1993
Kabushiki Kaisha Toshiba, Kanagawa, JP;
Abstract
A semiconductor integrated circuit device comprises a semiconductor substrate; an input and output terminal (1) formed on the semiconductor substrate; an input and output circuit (2, 3) formed on the semiconductor substrate, connected to the input and output terminal (1), and having an output buffer (2) of CMOS FETs, supply voltages Vcc1 and Vcc2 being applied to the output buffer; a semiconductor integrated circuit formed on the semiconductor substrate and connected to the input and output circuit; and a circuit for preventing forward junction current from flowing from the input and output terminal (1) to the output buffer (2) when an input voltage exceeding the supply voltages is applied to the output buffer. In an integrated circuit device using a plurality of different supply voltages, it is possible to prevent an input voltage beyond the supply voltages from being applied to the input and output circuit. A voltage switching circuit (4) responsive to signals A and B supplied to an output buffer (2) is interposed between the output buffer (2) and a pad (1). When a voltage higher than the supply voltages is applied to the output buffer (2) from the outside, the substrate potential is determined to a value equal to or higher than the external voltage. Further, the voltage applied from the outside can be also lowered than the supply voltages of the output buffer, before applied to the output buffer.