The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 05, 1995
Filed:
May. 12, 1994
Matsushita Electronics Corporation, Osaka, JP;
Abstract
A current mirror is composed of N-MOS transistors N1, N2, a diode-connected P-MOS transistor P1 is connected to an output side of the current mirror, and a source of a P-MOS transistor P2 controlled according to the gate potential of the P-MOS transistor P1 is connected to a power source V.sub.CC via a polysilicon resistor R. The drain of the P-MOS transistor P2 is connected to the drain of the N-MOS transistor N2. A current-mirror-connected N-MOS transistor N3 is provided at the current mirror of the N-MOS transistors N1, N2. The output of the N-MOS transistor N3 is inputted to another current mirror composed, on the power source V.sub.CC side, of two P-MOS transistors P3, P4, a constant current is outputted from the drain of one of the two P-MOS transistors P3, P4 and received by a load circuit which is the series-parallel connection of diode-connected P-MOS transistors P5-P8, and the voltage generated at the load circuit is outputted as a reference voltage output V.sub.REF. Thereby a negative temperature dependency that the reference voltage V.sub.REF drops at high temperature and rises at low temperature is cancelled or is made positive.