The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 1995

Filed:

Jun. 11, 1993
Applicant:
Inventors:

Seiichi Oshima, Fukuoka, JP;

Fumitaka Tametani, Fukuoka, JP;

Jun Yamagata, Fukuoka, JP;

Ken Takanashi, Fukuoka, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257691 ; 257700 ; 257724 ; 257660 ;
Abstract

In a circuit board having four-layered conductive pattern on which a control circuit is arranged, wiring sub-patterns 133a in the first layer are divided into four areas A1-A3 and A8, for respective sets of circuit parts having same power potentials. Respective sub-patterns belonging to the areas A1-A3 are partially or fully surrounded by wiring sub-patterns PEa1 PEa3 connected to negative power potentials of circuit parts belonging to respective areas, respectively. Similarly, at least part of a wiring patten Pa2 for transmitting an input signal to a semiconductor active element is surrounded by a wiring pattern PEa4. Penetration of electric noises to the wiring patterns for the control circuit, in particular to the wiring pattern for transmitting the input signal to semiconductor element, is decreased to thereby prevent misoperation due to electric noises.


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