The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 1995

Filed:

Dec. 18, 1992
Applicant:
Inventors:

Philip L Childs, Raleigh, NC (US);

Nimish S Radia, Cortland, NY (US);

Joseph F Skovira, Binghamton, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395500 ; 3642712 ; 3642713 ; 364269 ; 364D / ; 364578 ; 395550 ;
Abstract

A logic simulator is distributed over a plurality of processing nodes for simulating a circuit. A plurality of logic simulation programs execute on respective ones of the nodes, and simulate respective parts of the circuit. Each of the logic simulation programs executes at its own pace, and either receives an input from or supplies an output to another of the nodes. Each of the logic simulation programs also predicts an input when unavailable from another of the nodes. A host broadcasts a breakpoint time to all of the nodes. A plurality of logic simulation controllers execute on respective ones of the nodes, and direct storage of nets and/or states of the logic simulation programs. Each of the logic simulation controllers receives the breakpoint time from the host and reports to the host when the respective logic simulation program has advanced to or past the breakpoint time. When all of the nodes have reported that their respective logic simulation programs have advanced to or past the breakpoint time, this means that nets and states at the breakpoint time are valid. Then, the host obtains from one or more of the nodes values of one or more nets and/or states at the breakpoint time. In another mode of operation, before broadcasting the breakpoint time, the host sends to one of the nodes responsible for generating a condition or event a request to notify the host when the condition or event occurs and a local virtual time that the condition or event occurred. The host then broadcasts the local virtual time as the breakpoint time.


Find Patent Forward Citations

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Childs, Philip. (1995). Common breakpoint in virtual time logic simulation for parallel (U.S. Patent No. 5442772). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5442772

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