The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 1995

Filed:

Sep. 03, 1993
Applicant:
Inventors:

Ravi Vig, Concord, NH (US);

Hitoshi Yabusaki, Tokyo, JP;

Alberto Bilotti, Argentina, FL (US);

Assignee:

Allegro Microsystems, Inc., Worcester, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ; G01B / ; H03K / ;
U.S. Cl.
CPC ...
3242072 ; 324251 ; 324174 ; 32420725 ; 327511 ; 307116 ;
Abstract

The Hall sensor circuit includes a Hall element that is preferably followed by a Hall-voltage amplifier, and a pole end of a magnet is preferably fixed adjacent to the Hall element. The amplifier output is connected directly to one of a pair of differential inputs of a Schmitt trigger circuit and is also connected, via a single or a dual-polarity track and hold circuit, to the other of the differential Schmitt inputs. The dual-polarity track and hold circuit causes the voltage across a capacitor to track positive and negative Hall voltage slopes, and to hold the positive-going peaks and negative-going peaks of the Hall voltage presented to the fore-mentioned other Schmitt input so that when the difference voltage between the Hall voltage and the held voltage of the capacitor exceeds a positive or negative threshold of the Schmitt circuit, the Schmitt circuit output changes binary state indicating the approaching edge or the receding edge of a ferrous-gear tooth. The dual-polarity track and hold circuit is made up of two complementary plus and a minus peak detector circuits, each including a bipolar transistor having an emitter connected to the voltage-holding capacitor, an operational amplifier with an output connected to the base of the transistor, the amplifier having a negative input connected to the transistor emitter and a positive input serving as the input of the each Hall voltage tracking and holding circuit.


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