Method for making channel stop structure for cmos devices

Abstract

In a semiconductor device having two N type regions separated by a P type region, a channel stop is needed to prevent shorting between the two N type regions. The channel stop of the invention has oxide isolators over the two N type regions and a P+ type diffusion lying between the oxide isolators in the P type region. When the N type regions are phosphorus doped deep N- regions biased at different potentials and the P type region is a boron doped P- region, a shallow P+ boron region within the P- region acts as a blocking mechanism to prevent phosphorus from piling up at the semiconductor surface and shorting the two N- regions. The channel stop may be manufactured without adding additional steps to a CMOS process flow. The oxide isolators may be formed when the oxide isolator over the inverse moat separating the P tank and the N tank is created. The P+ region within the channel maybe formed when the sources and drains for transistors within the N tank are formed.