Testing circuitry of internal peripheral blocks in a semiconductor

Abstract

A semiconductor memory including test circuitry for directly determining the functionality of internal circuitry. The gates of test transistors are connected to the ends of signal lines in the memory, examples of which include bit lines, row or word lines, and control signal lines. Upon entry into a special test mode, the test transistors are biased to a voltage such that the active signal, if present, will turn on the test transistor and produce a signal indicating whether or not the active signal reached the test transistor. Multiple test transistors may be used to provide additional information, including the presence of short circuits, and the operation of multiple circuits within the memory.