The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 1995

Filed:

Mar. 08, 1994
Applicant:
Inventors:

Stephen T Flannagan, Austin, TX (US);

Ray Chang, Austin, TX (US);

Lawrence F Childs, Austin, TX (US);

Assignee:

Motorola Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365194 ; 365233 ; 327158 ; 327250 ; 327277 ;
Abstract

A memory (20) includes a write control delay locked loop (52) for controlling a write cycle of the memory (20). The delay locked loop (52) includes an arbiter circuit (264), a voltage controlled delay (VCD) circuit (260), and a VCD control circuit (265). The arbiter circuit (264) compares a clock signal to a delayed clock signal from the VCD circuit (260). In response, the arbiter circuit (264) provides a retard signal to the VCD control circuit (265). The VCD control circuit (265) receives the retard signal and adjusts a propagation delay of the delayed clock signal to compensate for changes in the clock frequency, as well as to compensate for process, temperature, and power supply variations.


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