Phase differential measurement circuit

Abstract

A signal processing circuit measures the phase difference between digitally formated reference tone and telephone line signals over a prescribed number of signal periods so as to provide to an attendant processor an average value of phase differential. The reference tone and line signals are conditioned as square wave signals, and applied to a first exclusive-OR circuit and to respective divide-by-two flip-flop circuits, which produce square wave signals having a frequency which is half the frequency of the conditioned square wave signals. The output of the first exclusive-OR circuit represents the half-cycle phase difference between the two sine waves. The full-cycle square wave signals are applied to a second exclusive-OR circuit, which produces a series of pulses, each representing a respective full-cycle phase difference between the reference and line sine waves. The delayed outputs of the exclusive-OR circuits are selectively coupled to first and second counters, which provide a measure of average phase delay between the reference and line signals. The delayed pulse signal associated with a respective full-cycle difference between the reference and line sine waves is applied to the clock input of a lead/lag flip-flop, the data input of which receives the reference half-cycle square wave. The lead/lag flip-flop output indicates whether the phase of the reference tone leads or lags the phase of the line signal.