The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 1995

Filed:

Mar. 03, 1994
Applicant:
Inventor:

Hiroaki Mori, Osaka, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04Q / ;
U.S. Cl.
CPC ...
370 66 ; 370 68 ;
Abstract

A circuit for confirming a connection route of an address control memory includes a data memory, an address counter and the address control memory. The address control memory includes a reading memory for storing data to an address which is a respective position of the time-division multiplexed data in time slots given when the time-division multiplexed data is read from the data memory as an output data and the data is a respective position of the time-division data in the time slots given when the time-division multiplexed data is written into the data memory as input data. A writing memory is provided for storing data to an address which is a respective position of the time-division multiplexed data in time slots given when the time-division multiplexed data is written to the data memory as input data, and the data is a respective position of the time-division multiplexed data in time slots given when the time-division multiplexed data is read from the data memory, thereby specifying from the time slot position of data at the time of reading, the time slot position of data at the time of writing, and specifying from the time slot position of data at the time of writing, the time slot position of data at the time of reading.


Find Patent Forward Citations

Mori, Hiroaki. (1995). Circuit for confirming a connection route of address control memory (U.S. Patent No. 5434857). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5434857

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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