The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 11, 1995
Filed:
Apr. 15, 1994
Adrian S Butter, Binghamton, NY (US);
Chang Y Kao, Boulder, CO (US);
James P Kuruts, Forest City, PA (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An improved DES unit internally checks whether the DES algorithm is being performed without error. A standard DES algorithm performs an initial permutation of input data and then multiple rounds or iterations of the following: expanding part of a result of the initial permutation for the first iteration and a result of the previous iteration for the subsequent iterations, exclusive ORing a result of the expansion with key bits, performing a selection function on a result of the exclusive ORing, permuting a result of the selection function, and exclusive ORing a result of the permuting. In the improved DES unit, data check bits that correspond to the input data which has been expanded are exclusive NORed with key check bits that correspond to the key, and a result of the exclusive NORing is checked against a result of the exclusive ORing to identify any errors in the operation of the basic DES unit. Also, a check selection function is performed on the result of the exclusive ORing. A result of the check selection function is exclusive NORed with data check bits for another part of the input data to yield input data for input to the expanding function for a next iteration. Also, the improved DES unit checks for accuracy in processing an input key by permuted choicing the input key, key shifting a result of the permuted choicing, and checking a result of the key shifting against key check bits which correspond to the input key and bypass the permuted choicing and key shifting functions.