The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 11, 1995
Filed:
Oct. 23, 1990
Gene L Armstrong, II, Garland, TX (US);
William F Davies, Jr, Carrollton, TX (US);
David L Freeman, Plano, TX (US);
Benchmarq Microelectronics, Inc., Carrollton, TX (US);
Abstract
A battery monitoring/control device includes a monitor/control device (35) that is operable to be integrated with a microprocessor system. The system includes a CPU (12) that interfaces with a data bus (14) and an address bus (16). The CPU (12) interfaces through a data line (40) with the control/monitor device (35) and control lines (28) and (34). Commands and data can be input to the control/monitor circuit (35) and data received therefrom. The control/monitor device (35) includes a controller/data register block (36) and a battery charge control/monitor block (44). The device (35) is operable to monitor the battery voltage of a secondary battery (46) during charging thereof and to control the rate of charge through a transistor (66). The battery monitor (90) determines when the voltage on the battery (46) reaches a predetermined level indicating full-charge. A discharge circuit (94) controls a discharge transistor (72) to discharge the battery (46) through a sense resistor (68) for conditioning of the battery. The system receives current from the battery (46) through the resistor (68), the current monitored by a Gas Gauge monitor (92). The Gas Gauge monitor (92) maintains a measurement of the capacity of the battery (46). Control and status information is maintained in control/status register (56), which are set to a default value in a default register (57) upon power up. The CPU (12) can store control information in the registers (56) in order to control the device (35). Further, status information of the device (35) can be stored in the register (56) for access by the CPU (12) through a bus interface (52).