Repeatedly programmable logic array using dynamic access memory

Abstract

A typical Programmable Logic Array (PLA) provides an available logic function, or precursor, which a user modifies to obtain a desired logic function. For example, the precursor may be (A.multidot.A19 B.multidot.B+(A.multidot.A.multidot.B.multidot.B). The user obtains the desired function, such as (A.multidot.)+(A.multidot.B), by blowing fuses inside the PLA. The fuse-blowing physically blocks data signals (such as the deleted and the deleted B in the first term) from reaching an internal AND gate which performs the '.multidot.' operation. However, this fuse-blowing is permanent, and irreversible. In contrast, one form of the invention does the blocking by using a NAND gate. That is, the data signal, such as the 'B,' is applied to one input of the NAND gate. A capacitor is connected to the other input. The user stores either a ONE or a ZERO on the capacitor. A ONE blocks the data signal (the output of the NAND cannot change). A ZERO passes the data signal (the output is the inverse of the data signal). Thus, not only is the PLA PROGRAMMABLE, but is also REPEATEDLY PROGRAMMABLE: the signal on the capacitor can be changed.