The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 1995

Filed:

Mar. 07, 1994
Applicant:
Inventor:

Yasuhiko Hagihara, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364748 ;
Abstract

A floating point multiplier includes an exponential part adder for receiving and adding exponential parts of a multiplied value and a multiplying value and outputting an exponential addition result, a binary multiplier for receiving and multiplying mantissa of the multiplied value and the multiplying value and for outputting the multiplication result, an OR gate inputting for receiving a predetermined number of lower order bits of the multiplication result and outputting a logical sum of the lower order bits as a sticky bit, rounding process and normalization process circuit for receiving a predetermined number of higher order bits of the multiplication result and the sticky signal, performing a rounding process and a normalizing process for the higher order bits of the multiplication result on the basis of the sticky bit, coupling a result of normalization with the addition result of the exponential parts and outputting a final multiplication result, and a selection circuit for receiving the final multiplication result and the lower order bits of the multiplication result of the binary multiplier and selectively outputting.


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