Input protection circuit for protecting an internal circuit of a

Abstract

A circuit is provided for protecting the internal circuit of a semiconductor device from electrostatic discharge (ESD). This circuit includes an input pad for applying an input signal to the internal circuit, a metal line for electrically connecting the input pad and internal circuit. This metal line has at least one RC delay stage caused by inherent parasitic resistances and capacitances. Also, a punch-through element is provided to connect the metal line to a ground voltage terminal disposed between the input pad and a delay stage. Finally, a resistor is used to connect the at least one delay stage to the internal circuit.