The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 1995
Filed:
May. 10, 1993
Motorola, Inc., Schaumburg, IL (US);
Abstract
An integrated circuit (40) has a low-power mode in which at least one switched inverter stage (60) of a clock amplifier (41) is disabled in response to a stop signal. The stop signal indicates that the integrated circuit (40) is in low-power mode. In one embodiment, each switched inverter stage is a complementary metal-oxide-semiconductor (CMOS) switched inverter (60), in which an additional P-channel transistor (61) is connected between the source of an inverter P-channel transistor (62) and a positive power supply voltage terminal, and in which an additional N-channel transistor (64) is connected between a source of an inverter N-channel transistor (63) and a negative power supply voltage terminal. A non-switched inverter stage (52) remains active during low-power mode to maintain a DC value of a clock input signal near a switchpoint of the clock amplifier (41).