The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 1995

Filed:

May. 07, 1993
Applicant:
Inventors:

Keith Rouse, Oxford, CT (US);

Terry F Montlick, Bethlehem, CT (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395275 ; 36494205 ; 3642601 ;
Abstract

An event signalling system is provided for a digital signal processor apparatus which has a central data RAM, at least one computing processor, each computing processor having event occurrence circuitry, a plurality of data I/O processors, and a data RAM bus coupled to the data RAM, the computing processor(s) and the I/O processors. The event signalling system includes an address code generating circuit in each data I/O processor for generating different predetermined address codes for each I/O processor and for writing the predetermined address codes onto the data RAM bus upon the occurrence of events of interest. The occurrence of the predetermined address codes on the data RAM bus. are monitored by an address decoder which generates different signals depending upon the predetermined address code found. The signals from the address decoder are carried by a flag bus to the event occurrence circuitry of the computing processor(s), and to the output sections of the I/O processors.


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