The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 1995

Filed:

Jul. 01, 1993
Applicant:
Inventors:

Lih-Jyh Weng, Shrewsbury, MA (US);

Bruce A Leshay, West Boylston, MA (US);

Diana L Langer, Northboro, MA (US);

Assignee:

Quantum Corp., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
371 401 ; 371 101 ;
Abstract

A method and system for verifying the integrity of data written to a mass memory medium. A local memory is directed by local memory control logic to store a data block that is received from a host microprocessor and that is to be written to the mass memory medium. The data block comprises a sequence of data symbols. An ECC encoder encodes the stored data block with error correction data. The error correction data comprises a sequence of error correction symbols that are appended to the data symbols. The data and error correction symbols are stored in the mass memory and immediately retrieved. An ECC decoder receives the retrieved data and error correction symbols from the mass memory and the data and error correction symbols of the encoded data block from the encoder. In response, the decoder generates an error status signal when more than a predetermined threshold number of the retrieved data and error correction symbols are improperly stored in the mass memory. The local memory control logic receives the error status signal and generates in response a second error status signal. The host microprocessor receives the second error status signal and generates in response remedial action signals.


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