The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 27, 1995
Filed:
Sep. 06, 1994
Applicant:
Inventors:
Hector Sanchez, Austin, TX (US);
Jose Alvarez, Leander, TX (US);
Gianfranco Gerosa, Austin, TX (US);
Assignee:
Motorola, Inc., Schaumburg, IL (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L / ;
U.S. Cl.
CPC ...
331 / ; 331-8 ; 331 14 ; 331 25 ;
Abstract
A phase locked loop (10) has a first (24) and a second (28) feedback path by which a generated clock signal may be phase and frequency matched to an input reference clock signal. The two feedback paths are delay matched so either one may be used to maintain 'PLL lock.' However, the first path consumes significantly less power than the second path. Control circuitry (22) selects which path is fed back through a multiplexer (126) and disables the second path when the path is not needed.