The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 1995

Filed:

Sep. 01, 1993
Applicant:
Inventors:

Hiroshi Ichige, Kodaira, JP;

Junichi Kono, Kodaira, JP;

Toshio Okochi, Ohme, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365220 ; 365221 ; 365236 ; 36518907 ; 36523005 ;
Abstract

The number of bits of data items read in parallel fashion and the number of bits of data items written in parallel fashion are related to be at least a whole number multiple of 2, thereby to achieve enhancement in the efficiency of data transfer between a semiconductor memory device and the exterior thereof. Further, in a semiconductor memory device of FIFO type, the number of stored data items is calculated using the values of a write counter and a read counter, thereby to achieve the accurate acquisition of the number of stored data items even when the operations of reading and writing data items coincide. In a semiconductor memory device having a built-in address counter, the value of the address counter or an external address signal is selected on the basis of an external instruction in order to address a memory cell, thereby to achieve facilitation of random accesses to memory cells and also the clearing of the data items of any desired memory cells.


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