System for dc restoration of serially transmitted binary signals

Abstract

A device for restoring DC and non-zero average components of a serially transmitted binary signal which has been AC coupled. The device comprises an input port for the binary signal, a clamping circuit, a feedback network, a summing node, and an output port. The input port includes a capacitor for coupling the binary signal to the summing node and the clamping circuit. The feedback network includes an input and an output which are also connected to the summing node. The clamping circuit clamps the positive and negative peaks of the AC coupled binary signal which exceed a predetermined range. The feedback network latches the AC coupled binary signal and produces a current signal. For a binary signal which is within the predetermined range, the clamping circuit exhibits a very high input impedance, thereby causing the current signal to charge the coupling capacitor and produce a voltage which is added to the AC coupled binary signal at the summing node. The output port includes a comparator which converts the restored AC coupled binary signal to digital logic levels. In another embodiment, the clamping circuit includes a current sensor for producing an amplitude signal which is indicative of the amplitude of the AC coupled binary signal. The amplitude signal is fed to an automatic gain controller which produces a gain control voltage for controlling the operation of a high frequency equalizer.