The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 13, 1995
Filed:
Jun. 20, 1994
Applicant:
Inventors:
Geoffrey B Stephens, Cary, NC (US);
Scott J Tucker, Raleigh, NC (US);
Assignee:
International Business Machines Corp., Armonk, NY (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 81 ; 326 31 ; 326 58 ;
Abstract
A tristate buffer circuit for mixed voltage applications. The circuit is built from field effect transistors and is used as an output buffer in applications where a low voltage component needs to drive both components which are powered by the same low voltage and components which are powered by a higher voltage. The circuit uses a floating n-well technique in combination with a pass-gate network, a one-shot circuit, and a process-dependent bias voltage reference. It is particularly useful on CMOS semiconductor chips which have bus interfaces, such as local area network (LAN) protocol chips.