The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 1995
Filed:
Mar. 08, 1993
Roel T Horst, The Hague, NL;
Arian Koster, Mijdrecht, NL;
Karel J Rijkse, Gouda, NL;
Dolf A Schinkel, Hillegom, NL;
Koninklijke PTT Nederland N.V., Groningen, NL;
Abstract
An encoder for coding a digital signal comprises an encoder input for receiving the digital signal; a first data processor, having an input which is coupled to the encoder input, for generating a first coded digital signal at a first output of the first data processor; a first reduction device coupled to the encoder input, for reducing the received digital signal; a second data processor, having an input which is coupled to the first reduction device, for generating a second coded digital signal at a first output of the second data processor; a first encoder memory having an input which is coupled to a second output of the first data processor, and having an output which is coupled to the input of the first data processor; a second encoder memory having an input which is coupled to a second output of the second data processor, and having an output which is coupled to the input of the second data processor; and a first encoder prediction device having a first side which is coupled to the second output of the second data processor, and a second side which is coupled to both the input of the first encoder memory and the input of the first data processor. A decoder for decoding a digital signal which is encoded as described above, comprises a first data reprocessing device for processing a coded digital signal; and a decoder memory having an input which is coupled to an output of the first data reprocessing device.