The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 1995

Filed:

Jun. 22, 1993
Applicant:
Inventors:

Paul W Chung, San Jose, CA (US);

John E Gersbach, Burlington, VT (US);

Bac Pham, San Jose, CA (US);

Karl Hense, Goldendale, WA (US);

Pete Granata, San Martin, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
341118 ; 341155 ;
Abstract

An analog receiver circuit suitable for use with a flash analog-to-digital converter is described. A first stage of the receiver acts essentially as a voltage follower, receiving the centertap voltage of a flash A/D converter resistor ladder, and maintaining an internal reference voltage substantially equal to the centertap voltage over time. A second stage of the analog receiver acts as centering means, receiving an analog signal and centering it with respect to the internal reference voltage provided by the first stage. The receiver is thus able to provide an analog signal to the flash A/D converter which is dynamically centered with respect to the converter's operating voltage, thereby reducing DC offset. Moreover, introducing the analog signal at the second stage minimizes the bandwidth-limiting elements between this input signal and the DC-centered output signal. Thus DC offset is further reduced and operating frequencies of 500 MTz or greater are possible.


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