The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 1995

Filed:

Jul. 22, 1993
Applicant:
Inventor:

Randall J Pflueger, Cambridge, MA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323312 ; 323313 ; 323315 ;
Abstract

A bootstrap current reference circuit having an n-type negative resistance network, and a biasing device responsive to operating current of the n-type negative resistance network for biasing the network to operate as a current source at an operating point substantially in a region of a predetermined current peak associated with the n-type negative resistance network. In one embodiment the circuit includes a depletion-mode FET (DFET) and a stable trimmed n-type negative resistance device (ST-NNRD) connected in series with the source of the DFET. The gate of the DFET is feedback coupled to the output of the ST-NNRD so as to bias it in a region of operation in which it exhibits a large incremental resistance, thus bootstrapping the circuit to operate in a state substantially independent of fluctuations associated with supply voltage source. In an alternate embodiment, the circuit includes a ST-NNRD connected in series with the source terminal of a DFET. The DFET is one side of a current mirror with a second DFET, the current mirror being terminated by an impedance providing level matching and monostable loading of the ST-RTD.


Find Patent Forward Citations

Loading…