The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 1995
Filed:
Dec. 21, 1994
Frank Wanlass, Sunnyvale, CA (US);
Standard Microsystems Corporation, Hauppauge, NY (US);
Abstract
A back biasing technique is provided for increasing the field inversion voltage between adjacent MOS transistors and for reducing parasitic capacitances in an integrated circuit. The use of a charge pump is avoided by connecting the body portions of the MOS transistors to ground and the sources of the MOS transistors to the anode of a diode, the cathode of which are connected to a reference voltage such as to ground. In this manner, the sources are back biased relative to the material in which they are formed by a diode forward voltage drop. This technique is particularly applicable to CMOS circuits operating from a 3.3 volt supply, with p-well doping densities in excess of 1.times.10.sup.17 atoms/cm.sup.3.