The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 1995

Filed:

Feb. 07, 1994
Applicant:
Inventors:

David Ford, Gilbert, AZ (US);

Emil N Hahn, Gilbert, AZ (US);

Michael D Reed, Mesa, AZ (US);

Nandini Srinivasan, Chandler, AZ (US);

Philip A Jeffrey, Tempe, AZ (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L / ; H04L / ;
U.S. Cl.
CPC ...
331-2 ; 331 25 ; 331 48 ; 331 55 ; 331 56 ; 331D / ; 375363 ; 375376 ;
Abstract

A serial data clock receiver circuit (11) is provided that synchronizes a clock signal to data. The serial data clock receiver circuit (11) comprises a control circuit (21), a dual oscillator circuit (19), and a phase locked loop circuit (22). The control circuit (21) arms the dual oscillator circuit (19) for being enabled during an idle period. The phase locked loop circuit (22) provides a reference voltage for the dual oscillator circuit (19). The dual oscillator circuit (19) is responsive to both the data and control circuit (19) for providing a clock signal.


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Ford, David. (1995). Serial data clock recovery circuit using dual oscillator circuit (U.S. Patent No. 5418496). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5418496

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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