The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 1995

Filed:

Dec. 20, 1993
Applicant:
Inventors:

Alain Duret, Saint Pierre, FR;

Eric Boulian, Grand-Lancy, CH;

Anil Gercekci, Geneva, CH;

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327172 ; 327100 ; 327 58 ; 327227 ;
Abstract

A clock signal conditioning circuit (100) for use in a smart card (102) has an input node (112) for receiving an applied clock signal, an output node (126) for producing a conditioned clock signal, a rising/falling edge detector (118) for detecting edges in the received clock signal, a bistable device (122) for forming at the output node a clock signal in response to the edge detector, and a timer (120, 124) for inhibiting switching of the bistable device for a predetermined time (T) following detection by the edge detector of an edge. Such a clock signal conditioning circuit provides a conditioned clock signal which is substantially independent of variations in the duty cycle of the applied clock signal and is substantially immune to glitches in the applied clock signal.


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