The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 1995

Filed:

Dec. 21, 1992
Applicant:
Inventors:

Eiji Ogino, Nara, JP;

Shigeki Imai, Nara, JP;

Takeshi Yoshii, Nara, JP;

Masahiko Wada, Nara, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G01R / ;
U.S. Cl.
CPC ...
395575 ; 371 221 ; 371 226 ;
Abstract

A semiconductor integrated circuit which includes a central processing unit, one or more peripheral circuits, one or more external terminals for transferring signals to or from the integrated circuit, and circuits for selecting the central processing unit or one of the peripheral circuits and solely operating the selected one in a test mode. The circuit for selecting includes a test mode control circuit and a signal control circuit. The test mode control circuit generates and supplies control signals in response to test operating signals having particular timings different from those of an actual operating signal inputted through the external terminal in a normal mode. The signal control circuit serves to separate the selected one from the others in a manner to allow the separated one to solely operate in the test mode.


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