The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 09, 1995
Filed:
Dec. 18, 1992
Henry T Verheyen, San Jose, CA (US);
Charles J Kring, Jr, Sunnyvale, CA (US);
Robert Osann, Jr, San Jose, CA (US);
Aptix Corporation, San Jose, CA (US);
Abstract
A programmable interconnect system includes a two-level hierarchal structure of programmable interconnect chips on a circuit board. The first-level, or 'local', interconnect chips are connected to user components. A plurality of second-level, or 'global', interconnect chips interconnect the local interconnect chips so that every local chip is connected to every global chip. Such a system allows connecting any pin of any user component to any other pin of any user component by a conductive path passing through at most three interconnect chips. A large number of such paths are provided even in embodiments with a large number of interconnect chips.