Semiconductor device chip with interlayer insulating film covering the

Abstract

An integrated circuit wafer composed of a substrate having a surface carrying a plurality of circuit chips spaced from one another by scribe lines constituted by regions of the substrate surface along which the substrate will be cut in order to separate the chips from one another, each chip having at least one semiconductor element composed of a plurality of patterned layers of electrically conductive material and the wafer further including at least one interlayer insulation film having portions which extend across each chip and interposed between two of the layers of electrically conductive material to form a component part of each element, the interlayer insulation film further having portions which extend across the scribe lines at the time the substrate is cut along the scribe lines and which are contiguous with portions of the interlayer insulation film that extend across each chip, wherein the wafer is provided with one or more defined patterns located at at least one scribe line region and a passivation film covering the chips and the at least one scribe line region, and each defined pattern is constituted by one of: an observable irregularity in the wafer surface; a film portion of insulating material; or a film portion of electrically conductive material. A strip of electrically conductive material may be disposed in a groove in the interlayer insulation film along each longitudinal edge of each scribe line.