The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 1995

Filed:

Jun. 11, 1993
Applicant:
Inventors:

Masahiro Shimizu, Kofu, JP;

Takayuki Fukasawa, Higashihiroshima, JP;

Yuichiro Yamazaki, Tokyo, JP;

Motosuke Miyoshi, Tokyo, JP;

Haruo Okano, Tokyo, JP;

Katsuya Okumura, Poughkeepsie, NY (US);

Assignees:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
156345 ; 118719 ; 1187 / ; 20429837 ; 216 67 ;
Abstract

A wafer plasma-etching apparatus includes electron generating, accelerating and processing chambers. Electron are drawn out of plasma generated in the electron generating chamber, accelerated in the accelerating chamber and introduced, as an electron beam, into the process chamber. A semiconductor wafer is positioned flat and parallel to an electron introducing direction in the process chamber. Process gas is introduced into the process chamber and excited into plasma by the electron beam. The wafer is etched by this plasma. Magnetic field is formed at the entrance of the process chamber such that the electron beam is divided to both sides of its extended center line in a horizontal plane and compressed flat in a vertical plane. The magnetic field is also formed such that the electron beam is carried in the horizontal direction at a position where the wafer is arranged in the process chamber. A sheet-like plasma region having a higher density of ions and a more uniform distribution thereof can be thus formed all over the surface of the wafer.


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