Word line driving circuit of a semiconductor memory device

Abstract

A word line driving circuit for use in a semiconductor memory device having a first supply voltage terminal to which a pumping voltage higher than a supply voltage supplied from the exterior of a chip is applied and a second supply voltage terminal to which a ground voltage is applied includes a decoding circuit connected between the first supply voltage terminal and second supply voltage terminal, for receiving a decoded row address, a precharge circuit connected to an output terminal of the decoding circuit, a transfer circuit for receiving an output signal of the decoding circuit and a word line boosting signal, and a word line output circuit connected between the first supply voltage terminal and second supply voltage terminal, for driving a word line.