The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 1995

Filed:

Apr. 14, 1992
Applicant:
Inventor:

Ralph G Whitten, San Jose, CA (US);

Assignee:

Aptix Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H01L / ;
U.S. Cl.
CPC ...
326 41 ; 326 39 ;
Abstract

An interconnection matrix configured according to the present invention includes a plurality of conductors disposed on a substrate which may contain an integrated circuit. A first group of the conductors are directly connected to I/O pins provided on the substrate. A second group of the conductors are internal to the substrate. A plurality of programmable elements are disposed on the substrate and are connected between selected ones of the first and second groups of conductors. By selectively programming the antifuse elements, a user may configure the conductors into a custom interconnect pattern. Means are provided to place each conductor in the second group of internal segmented conductors at a selected voltage during programming of the interconnect architecture of the present invention. The antifuses in a selected circuit path between two I/O pads are all initially programmed at an appropriate programming voltage utilizing a low current. After all antifuses in the selected circuit path have been initially programmed, a high programming current is passed through the circuit path between the I/O pads at its ends to complete the programming cycle.


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