Dynamic type semiconductor memory device with dummy cells capable of

Abstract

A dynamic type semiconductor memory device comprises a semiconductor substrate including a memory cell array, the memory cell array including two kinds of main memory cells and two kinds of dummy cells, a plurality of bit lines disposed above the semiconductor substrate and generally extending in a first direction, a plurality of word lines disposed above the semiconductor substrate and generally extending in a second direction so as to intersect the bit lines, and dummy word lines disposed above the semiconductor substrate and generally extending in the second direction so as to intersect the bit lines. In this case the main memory cells and the dummy cells are connected to the bit lines, the word lines and the dummy word lines, respectively, in such a manner that one of the main memory cells and one of the dummy cells each having the same kind are selected when any one of the main memory cells is selected. As one kind of the main memory cells, trench capacitor type memory cells are used, while stacked capacitor type memory cells are employed as the other kind of the main memory cells.