The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 1995

Filed:

Oct. 23, 1992
Applicant:
Inventor:

Yutaka Maruo, Suwa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 29 ; 437 56 ; 437913 ;
Abstract

A method for reducing implant-induced damage and residual photo-resist-induced damage to a gate insulator layer first forms a gate insulator layer on portions of a semiconductor substrate. A first gate electrode layer is formed over the gate insulator layer, this first gate electrode layer being thinner than the desired final gate electrode thickness. A threshold adjustment implant is performed through the first, thin, gate electrode layer and underlying gate insulator layer. A second gate electrode layer is formed over the first gate electrode layer such that the thickness of the first and second gate electrode layers are substantially equal to the desired final gate electrode thickness. The first and second gate electrode layers are then patterned concurrently by conventional photolithography processes to form the gate electrodes. These steps prevent the attachment of resist particles to the gate insulator layer and prevent the ion implant-induced damage to the gate insulator by using the first gate electrode layer as a buffer.


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