The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 11, 1995
Filed:
Jun. 15, 1994
Kyung S Lee, Seoul, KR;
Goldstar Electron Co., Ltd., , KR;
Abstract
An electro static discharge protection circuit capable of achieving an improvement in ESD protection characteristic by an isolation between the inner cell ground and the ESD protection circuit ground and use of a field oxide transistor. The protection circuit includes first and third p type wells formed at a peripheral circuit region of a n type substrate and a second p type well formed at a cell region of the substrate, a first p.sup.+ type impurity-diffused region, first, second and third n.sup.+ type impurity-diffused regions, all of the impurity-diffused regions being formed in the first p type well, a second p.sup.+ type impurity-diffused region formed in the second p type well, a third p.sup.+ type impurity-diffused region, fourth, fifth and sixth n.sup.+ type impurity-diffused regions, all of the impurity-diffused regions being formed in the third p type well, a field oxide film formed over a surface portion of the n type substrate between adjacent high concentration impurity-diffused regions formed in each of the first and third p type wells, and gate electrodes respectively formed on portions of the field oxide film disposed between the second and third n type impurity-diffused regions and between the fourth and fifth n type impurity-diffused regions.