The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 1995

Filed:

Jun. 02, 1994
Applicant:
Inventor:

Toshiyuki Oashi, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
257296 ; 257298 ; 257306 ; 257347 ; 257350 ; 437 48 ; 437 49 ; 437 52 ; 437 59 ; 437 84 ; 437190 ; 437915 ;
Abstract

A surface stepped portion of the top interlayer insulating layer is reduced. An insulating layer is formed on the entire surface of a silicon substrate. A silicon layer is formed on and in contact with an upper surface of insulating layer. A pair of source/drain regions are formed in silicon layer with a predetermined space. A gate electrode is formed on a region sandwiched by the pair of source/drain regions with a gate insulating layer interposed therebetween. A bit line is formed in connection with source/drain region, and extending in contact with an upper surface of insulating layer. A capacitor configured of a lower electrode layer, a capacitor insulating layer, and an upper electrode layer is formed in contact with source/drain region through a contact hole formed in an interlayer insulating layer.


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