The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 28, 1995
Filed:
Apr. 02, 1992
Thomas J Schaefer, Cupertino, CA (US);
Robert D Shur, Los Altos, CA (US);
VLSI Technology, Inc., San Jose, CA (US);
Abstract
A buffer circuit for fanning out a source signal to a plurality of terminals of specified polarities in accordance with specified time constraints is designed by an automated method in which a circuit template is specified in terms of a tree structure. The terminals are ordered in increasing order of required arrival times of the source signal at each of the terminals. A first terminal in a resulting order is assigned to a highest-level potential terminal site of a same polarity as said first terminal, and buffers on a signal path between said first terminal and the source signal are sized so as to satisfy, if possible, a required arrival time of the source signal at said first terminal. So long as required times of arrival are met, additional terminals are placed in like manner. The method proceeds as far as possible using a straight forward assignment procedure of terminals to potential terminal sites, then backtracks, undoing so much of the previous assignments as necessary and making incremental adjustments to allow the method to proceed further if possible. The method is completed when either all terminals have been successfully assigned or all of the previous assignments have been undone.