Common mode logic multiplexer configuration

Abstract

A multiplexer configuration includes at least one first and one second group of transistors each including one first, one second and at least one third transistor. Current sources are connected to a first supply potential terminal and emitters of the transistors of each respective one of the groups are connected to one another and to a respective one of the current sources. A first resistor has one terminal connected to a second supply potential terminal and has another terminal and collectors of the first transistors of each respective one of the groups are connected to one another and to the other terminal of the first resistor. An output terminal is connected to the other terminal of the first resistor. Bases of the second transistors of each respective one of the groups are input terminals for a respective data signal. Bases of the third transistors of each respective one of the groups are terminals for a respective selection signal. The selection signals are mutually complementary. Second resistors each have one terminal being connected to the second supply potential terminal and another terminal. Collectors of the second and third transistors of each respective one of the groups are connected to one another and to the other terminal of a respective one of the second resistors. The other terminal of the second resistor of each respective one of the groups is connected to the base of the first transistor of the respective group.