The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 1995

Filed:

Jan. 25, 1994
Applicant:
Inventors:

John B Hughes, Hove, GB;

Kenneth W Moulding, Horley, GB;

Assignee:

U.S. Philips Corporation, New York, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365 45 ; 365233 ;
Abstract

An analogue current memory arrangement includes an input (30) and an output (33). A first (coarse) current memory cell (T31,S31,C31) senses the input current during clock phase .phi.1a and reproduces the sensed current during clock phases .phi.1b and .phi.2. A second (fine) current memory cell (T32,C32,S32) acts as a current source during phase .phi.1a when a reference voltage (VR) is applied to the gate of transistor (T32). The second current memory cell senses the difference between the input current and the output of the first current memry cell during phase .phi.1b and reproduces the sensed current during phase .phi.2. During phase .phi.2 the input switch (S30) is opened and the output switch (S34) is closed causing the combined outputs of the first and second current memory cells to be fed to the output (33). (FIGS. 3 and 4).


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