The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 1995

Filed:

Apr. 16, 1993
Applicant:
Inventors:

Thomas B Crabb, Grass Valley, CA (US);

Charles S Meyer, Nevada City, CA (US);

Assignee:

Nvision, Inc., Nevada City, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B / ; H04L / ;
U.S. Cl.
CPC ...
375257 ; 375219 ; 34082503 ;
Abstract

A switcher has a plurality of input ports and a plurality of output ports. A plurality of port transceivers each have first and second I/O ports, an input port connected to an output port of the switcher and an output port connected to an input port of the switcher. Each port transceiver provides a first input signal path from the first I/O port to the output port of the transceiver, a second input signal path from the second I/O port to the output port of the transceiver, a first output signal path from the input port of the transceiver to the first I/O port, and a second output signal path from the input port of the transceiver to the second I/O port. Each port transceiver has a first state in which it propagates a signal received at its input port to its second I/O port and a signal received at its first I/O port to its output port and the first output signal path presents a high impedance to the first I/O port, and a second state in which it propagates a signal received at its input port to its first I/O port and a signal received at its second I/O port to its output port and the second output signal path presents a high impedance to the second I/O port.


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