The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 07, 1995
Filed:
Sep. 24, 1993
Edward D Nowak, Pleasanton, CA (US);
VLSI Technology, Inc., San Jose, CA (US);
Abstract
A memory cell includes gated diodes as load elements. For example, the memory cell includes a word line, a bit line, an inverted bit line, a ground line, a power line, a first transistor, a second transistor, a third transistor, a fourth transistor, a first gated diode and a second gated diode. The first transistor has a first end connected to the inverted bit line, a second end, and a gate connected to the word line. The second transistor has a first end, a second end connected to the bit line, and a gate connected to the word line. The third transistor has a first end connected to the second end of the first transistor, a second end connected to the ground line, and a gate connected to the first end of the second transistor. The fourth transistor has a first end connected to the first end of the second transistor, a second end connected to the ground line, and a gate connected to the second end of the first transistor. The first gated diode includes a first end connected to the power line and a second end connected to the second end of the first transistor. The second gated diode includes a first end connected to the power line and a second end connected to the first end of the second transistor.