The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 1995

Filed:

May. 25, 1993
Applicant:
Inventor:

Yoshihiro Tabira, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 93 ; 326 21 ; 326101 ; 327292 ;
Abstract

In a semiconductor integrated circuit apparatus, a first logic circuit processes a clock signal inputted through an external clock input terminal, and each of a plurality of second logic circuits processes the clock signal outputted from the first logic circuit, and outputs the processed clock signal to a plurality of flip-flops. In the semiconductor integrated circuit apparatus, an inner clock signal line is provided for electrically connecting the plurality of second logic circuits with the plurality of flip-flops, wherein the inner clock signal line is formed in a ring shape in the periphery of the semiconductor integrated circuit apparatus so that the plurality of flip-flops are located within the inner clock signal line, thereby reducing the clock skews therebetween in the semiconductor integrated circuit. Furthermore, an outer clock signal line is provided for electrically connecting the first logic circuit with the plurality of second logic circuits, and then the outer clock signal line is formed in a ring shape, thereby further reducing the clock skews therebetween in the semiconductor integrated circuit.


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